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| author | Subrata Banik <subratabanik@google.com> | 2022-02-15 20:49:01 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-18 20:23:33 +0000 |
| commit | 7848aa9335e764952d50f05f9c66cfbf70291ec0 (patch) | |
| tree | 6fadac698f452b428cb5222c23579f480e82d4c0 /3rdparty/intel-microcode | |
| parent | 95986169f93efe8b99c5b7d4a0fff3b5541d1377 (diff) | |
soc/intel/denverton_ns: Add function to clear PMCON status bits
This patch adds an SoC function to clear GEN_PMCON_A status bits to
align with other IA coreboot implementations.
Added `MS4V` macro for GEN_PMCON_A bit 18 as per EDS doc:558579.
Additionally, removed `PMC_` prefix from PMC configuration register
macros GEN_PMCON_A/B and ETR3.
Moved PMC PCI device macro from pmc.h to pci_devs.h and name PCH_PMC_DEV
to PCH_DEV_PMC. Also, adjust PCI macros under B0:D31:Fx based on
function numbers.
BUG=b:211954778
TEST=None.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I2690ccd387b40c0d89cf133117fd91914e1b71a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61974
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to '3rdparty/intel-microcode')
0 files changed, 0 insertions, 0 deletions