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authorSridhar Siricilla <sridhar.siricilla@intel.com>2022-03-30 09:41:36 +0530
committerPaul Fagerburg <pfagerburg@chromium.org>2022-03-30 13:39:54 +0000
commit0f5ca5ad8cba40b8e9cfa667b88f77b2e9bf597b (patch)
tree3c41e99974a3c6703a975512e33c9e065b9486ed /.gitreview
parentc2e3bd7c6c2801caaf83e36fb23fb436531716ed (diff)
mb/intel/adlrvp: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
The patch deselects ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR Kconfig for ADL RVP board. The flag updates PMC settings in the IFD for Alder Lake A0 silicon. As Alder Lake A0 is intermediate stepping, and the IFD is locked in the production systems, so the Kconfig is deselected. TEST=Build the coreboot for adlrvp Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I966be42ba662861f4a6933d7275ecc13860220f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63164 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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