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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-02-21 12:11:14 +0100
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2019-07-02 08:46:00 +0000
commita19b07fec13e713004e722f439e1ed7bc2e6ebd0 (patch)
tree6c3a55848dc8cdfa97cc0de2d93d87599d113f0c /.gitmodules
parentc1b7e8a60be9853b5b00fc70615cea2fa8bfafc5 (diff)
security/memory: Clear memory in ramstage
* Add architecture independend way of clearing all DRAM * Implemented in ramstage as MTRRs need to be set to speed up clearing. Takes up to 15 seconds per GiB otherwise. * Use memset_pae on x86 * Add quirks for FSP1.0 Tested on P8H61M-Pro: * Clears 4GiB in less than 1 second Tested on wedge100s: * Clears 8GiB in 2 seconds Change-Id: Idaadb8fb438e5b95557c0f65a14534e8762fde20 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31550 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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