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authorMichael Niewöhner <foss@mniewoehner.de>2022-01-09 02:17:30 +0100
committerPaul Fagerburg <pfagerburg@chromium.org>2022-01-14 00:29:13 +0000
commit7a2bc06b121a978b7517230f7b8de2b5cc94c7e7 (patch)
tree269e899bcced797c701d72ede48ec970e9eca66f /.clang-format
parentc14ba95bebf44154d512abd4741b080b5ed72fd8 (diff)
soc/intel/tgl/pcie_rp: add TGL-H support
Add TGL-H support for the recently introduced code for differentiating CPU and PCH root ports by adding the missing TGL-H port map. Change-Id: Id2911cddeb97d6c164662e2bef4fdeece10332a8 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60944 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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